Developing Embedded Applications using CompactRIO and LabVIEW FPGA course delivers a learning experience for designing, prototyping, and deploying reliable FPGA code for your application using NI CompactRIO. At the end of the course, you will be able to translate your embedded system requirements into a scalable software architecture, choose appropriate methods for inter-process communication, design, deploy and replicate your FPGA code for your embedded application.
Course Details:
Duration
- Instructor-led Classroom: Three (3) Days
Audience
- Users preparing to develop embedded control and monitoring applications using LabVIEW Real-Time and LabVIEW FPGA with CompactRIO, Single-Board RIO, and Real-Time PXI hardware
- Users interested in learning about performance and reliability considerations using NI Real-Time and FPGA targets
Prerequisites
- LabVIEW Core 1 and LabVIEW Core 2
After attending this course, you will be able to:
- Design, prototype, and deploy a datalogging control & monitoring application
- Acquire and generate analog and digital signals, control timing, and implement signal processing on FPGA
- Implement functionality on the FPGA for maximum performance and reliability using the LabVIEW FPGA Module
- Implement a human machine interface (HMI) on the PC
- Communicate data between FPGA, RT, and PC
- Debug, benchmark, and test your application
Developing Embedded Applications using CompactRIO and LabVIEW FPGA Course Outline
Lesson | Overview | Topics |
---|---|---|
Programming Using LabVIEW FPGA | Learn about FPGA common usages, how to work with them in LabVIEW, its user interfaces, compilation details and basic optimizations. | Introduction to FPGA Developing an FPGA VI Interactive Front Panel Communication Selecting an Execution Mode Compiling an FPGA VI Compilation Considerations Basic Optimizations |
Using FPGA I/O and Timing | Explore techniques for accessing and controlling I/O as well as the timing of the FPGA VI. | Configuring FPGA I/OExploring I/O Types Exploring Analog CompactRIO I/O Handling FPGA I/O Errors Setting Loop Execution Rates Synchronizing C Series Modules Creating Delays between Events Measuring Time between Events Benchmarking Loop Periods |
Signal Processing in LabVIEW FPGA | Explore data types, methods and built-in or external functions to process signals with the FPGA. | Using Fixed-Point Data Type Using Single-Precision Floating Point Performing FPGA Math & Analysis Integrating Third-Party Intellectual Property (IP) |
Inter-process Communication in LabVIEW FPGA | Explore the available communication mechanisms for processes running in the FPGA | Exploring Parallel Loops on FPGA Transferring Latest Data (Tag) Transferring Buffered Data (Stream, Message) |
Communicating between the FPGA and Real-Time VIs | Explore the available mechanisms to transfer data between the FPGA and the RT VIs | Programmatically Communicating with the FPGA VI from the Real-Time VI Deploying an FPGA VI Transferring Latest Data (Tag) Transferring Buffered Data (Stream, Message) Synchronizing the RT VI and FPGA VI Implementing an FPGA Watchdog |
Exploring Common FPGA Optimizations | Learn about optimizations for the FPGA performance and resource usage. | Optimization Use Cases Optimization Techniques for FPGA Size Optimization Techniques for Speed/Throughput Executing Code in Single-Cycle Timed Loops Implementing Pipelining Exploring Four-Wire Handshaking |
Debugging and Testing in FPGA | Learn techniques for debugging and testing your FPGA VI and explore some additional resources. | Debugging and Testing FPGA Code Investigating Additional Resources |